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--- dyld/dyld-1284.13/cache_builder/BuilderConfig.cpp
+++ dyld/dyld-1122.1/cache_builder/BuilderConfig.cpp
@@ -25,7 +25,6 @@
#include "BuilderConfig.h"
#include "BuilderOptions.h"
#include "CodeSigningTypes.h"
-#include "Platform.h"
#include "dyld_cache_config.h"
@@ -33,8 +32,6 @@
using namespace cache_builder;
using dyld3::GradedArchs;
-
-using mach_o::Platform;
//
// MARK: --- cache_builder::Logger methods ---
@@ -78,15 +75,9 @@
return archName == "arm64e";
}
-static uint32_t supportsTPROMapping(std::string_view archName)
-{
- return (archName != "x86_64") && (archName != "x86_64h");
-}
-
cache_builder::Layout::Layout(const BuilderOptions& options)
: is64(options.archs.supports64())
, hasAuthRegion(::hasAuthRegion(options.archs.name()))
- , tproIsInData(!::supportsTPROMapping(options.archs.name()))
, pageSize(defaultPageSize(options.archs.name()))
{
std::string_view archName = options.archs.name();
@@ -95,18 +86,33 @@
// x86_64 uses discontiguous mappings
this->discontiguous.emplace();
- this->discontiguous->regionAlignment = 1_GB;
- this->discontiguous->subCacheTextLimit = CacheVMSize(512_MB);
+ if ( options.isSimulator() ) {
+ // The simulator has fixed addresses
+ this->discontiguous->simTextSize = CacheVMSize(1.5_GB);
+ this->discontiguous->simDataSize = CacheVMSize(1_GB);
+ this->discontiguous->simLinkeditSize = CacheVMSize(1_GB);
+ this->discontiguous->simTextBaseAddress = CacheVMAddress(X86_64_SHARED_REGION_START);
+ this->discontiguous->simDataBaseAddress = this->discontiguous->simTextBaseAddress + this->discontiguous->simTextSize;
+ this->discontiguous->simLinkeditBaseAddress = this->discontiguous->simDataBaseAddress + this->discontiguous->simDataSize;
+ } else {
+ this->discontiguous->regionAlignment = 1_GB;
+ }
} else {
// Everyone else uses contiguous mappings
this->contiguous.emplace();
this->contiguous->regionPadding = CacheVMSize(32_MB);
- this->contiguous->subCacheTextDataLimit = CacheVMSize(2_GB);
this->contiguous->subCacheStubsLimit = CacheVMSize(110_MB);
-
- // Note we have 2 padding regions in total in a given TEXT/DATA/AUTH/... region
- // 1 between TEXT/DATA_CONST and DATA, then another from DATA to LINKEDIT.
- this->contiguous->subCachePadding = this->contiguous->regionPadding + this->contiguous->regionPadding;
+ }
+
+ if ( !options.isSimulator() ) {
+ // Devices always get large layout. Simulators get the regular layout
+ this->large.emplace();
+
+ if ( (archName == "x86_64") || (archName == "x86_64h") ) {
+ this->large->subCacheTextLimit = CacheVMSize(512_MB);
+ } else {
+ this->large->subCacheTextLimit = CacheVMSize(1.25_GB);
+ }
}
struct CacheLayout
@@ -121,32 +127,17 @@
layout.cacheSize = X86_64_SHARED_REGION_SIZE;
} else if ( (archName == "arm64") || (archName == "arm64e") ) {
layout.baseAddress = ARM64_SHARED_REGION_START;
-
- if ( options.isSimulator() ) {
- // Limit to 4GB to support back deployment to older hosts with 4GB shared regions
- layout.cacheSize = 4_GB;
- } else {
- layout.cacheSize = ARM64_SHARED_REGION_SIZE;
- }
-
- // Limit the max slide for arm64 based caches to 512MB. Combined with large
- // caches putting 1.5GB of TEXT in the first cache region, this will ensure that
- // this 1.5GB of TEXT will stay in the same 2GB region. <rdar://problem/49852839>
- cacheMaxSlide = 512_MB;
+ layout.cacheSize = ARM64_SHARED_REGION_SIZE;
} else if ( archName == "arm64_32" ) {
layout.baseAddress = ARM64_32_SHARED_REGION_START;
- layout.cacheSize = 2_GB;
-
- // The cache contents can't exceed 2GB, but use the space above it for the slide
- if ( ARM64_32_SHARED_REGION_SIZE >= layout.cacheSize ) {
- this->cacheFixedSlide = ARM64_32_SHARED_REGION_SIZE - layout.cacheSize;
- }
+ layout.cacheSize = ARM64_32_SHARED_REGION_SIZE;
} else {
assert("Unknown arch");
}
this->cacheBaseAddress = CacheVMAddress(layout.baseAddress);
this->cacheSize = CacheVMSize(layout.cacheSize);
+ this->allLinkeditInLastSubCache = this->cacheSize <= CacheVMSize(4_GB);
}
//
@@ -178,17 +169,10 @@
}
}
else if ( archName == "arm64e" ) {
+ this->slideInfoFormat = SlideInfoFormat::v3;
+
// 1 uint16_t per page
this->slideInfoBytesPerDataPage = 2;
-
- if ( layout.cacheSize > CacheVMSize(4_GB) ) {
- this->slideInfoFormat = SlideInfoFormat::v5;
-
- // 16k pages so that we can also use page-in linking for this format
- this->slideInfoPageSize = 0x4000;
- } else {
- this->slideInfoFormat = SlideInfoFormat::v3;
- }
}
else if ( archName == "arm64_32" ) {
this->slideInfoFormat = SlideInfoFormat::v1;
@@ -206,14 +190,14 @@
// MARK: --- cache_builder::CodeSign methods ---
//
-static cache_builder::CodeSign::Mode platformCodeSigningDigestMode(Platform platform)
-{
- if ( platform == Platform::watchOS )
+static cache_builder::CodeSign::Mode platformCodeSigningDigestMode(dyld3::Platform platform)
+{
+ if ( platform == dyld3::Platform::watchOS )
return cache_builder::CodeSign::Mode::agile;
return cache_builder::CodeSign::Mode::onlySHA256;
}
-static uint32_t codeSigningPageSize(Platform platform, const GradedArchs& arch)
+static uint32_t codeSigningPageSize(dyld3::Platform platform, const GradedArchs& arch)
{
std::string_view archName = arch.name();
if ( (archName == "arm64e") || (archName == "arm64_32") )
@@ -221,7 +205,7 @@
// arm64 on iOS is new enough for 16k pages, as is arm64 on macOS (ie the simulator)
if ( archName == "arm64") {
- if ( platform.isSimulator() || (platform == Platform::iOS) )
+ if ( dyld3::MachOFile::isSimulatorPlatform(platform) || (platform == dyld3::Platform::iOS) )
return CS_PAGE_SIZE_16K;
return CS_PAGE_SIZE_4K;
}