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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 | /* * Copyright (c) 2007 Apple Inc. All rights reserved. * * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ * * This file contains Original Code and/or Modifications of Original Code * as defined in and that are subject to the Apple Public Source License * Version 2.0 (the 'License'). You may not use this file except in * compliance with the License. The rights granted to you under the License * may not be used to create, or enable the creation or redistribution of, * unlawful or unlicensed copies of an Apple operating system, or to * circumvent, violate, or enable the circumvention or violation of, any * terms of an Apple operating system software license agreement. * * Please obtain a copy of the License at * http://www.opensource.apple.com/apsl/ and read it before using this file. * * The Original Code and all software distributed under the License are * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. * Please see the License for the specific language governing rights and * limitations under the License. * * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ */ #include <machine/asm.h> #include <arm/proc_reg.h> #include "assym.s" /* * save_vfp_registers * * Expects a pointer to the VFP save area in r3; saves the callee-saved registers to that save area. * Clobbers r2 and r3. */ .macro save_vfp_registers #if __ARM_VFP__ fmrx r2, fpscr // Get the current FPSCR... str r2, [r3, VSS_FPSCR] // ...and save it to the save area add r3, r3, #64 // Only s16-s31 are callee-saved #if (__ARM_VFP__ >= 3) vstmia.64 r3!, {d8-d11} vstmia.64 r3!, {d12-d15} #else fstmias r3!, {s16-s31} #endif /* __ARM_VFP__ >= 3 */ #endif /* __ARM_VFP__ */ .endmacro /* * load_vfp_registers * * Expects a pointer to the VFP save area in r3; loads the callee-saved registers from that save area. * Clobbers r2 and r3. */ .macro load_vfp_registers #if __ARM_VFP__ add r2, r3, #64 // Only s16-s31 are callee-saved #if (__ARM_VFP__ >= 3) vldmia.64 r2!, {d8-d11} vldmia.64 r2!, {d12-d15} #else fldmias r2!, {s16-s31} #endif /* __ARM_VFP__ >= 3 */ ldr r3, [r3, VSS_FPSCR] // Get our saved FPSCR value... fmxr fpscr, r3 // ...and restore it #endif /* __ARM_VFP__ */ .endmacro /* * void machine_load_context(thread_t thread) * * Load the context for the first thread to run on a * cpu, and go. */ .syntax unified .text .align 2 .globl EXT(machine_load_context) LEXT(machine_load_context) mcr p15, 0, r0, c13, c0, 4 // Write TPIDRPRW ldr r1, [r0, TH_CTH_SELF] mrc p15, 0, r2, c13, c0, 3 // Read TPIDRURO and r2, r2, #3 // Extract cpu number orr r1, r1, r2 // mcr p15, 0, r1, c13, c0, 3 // Write TPIDRURO ldr r1, [r0, TH_CTH_DATA] mcr p15, 0, r1, c13, c0, 2 // Write TPIDRURW mov r7, #0 // Clear frame pointer ldr r3, [r0, TH_KSTACKPTR] // Get kernel stack top mov r0, #0 // no param add r3, r3, SS_R4 ldmia r3!, {r4-r14} // Load thread status bx lr // Return /* * typedef void (*thread_continue_t)(void *param, wait_result_t) * * void Call_continuation( thread_continue_t continuation, * void *param, * wait_result_t wresult, * bool enable interrupts) */ .text .align 5 .globl EXT(Call_continuation) LEXT(Call_continuation) mrc p15, 0, r9, c13, c0, 4 // Read TPIDRPRW ldr sp, [r9, TH_KSTACKPTR] // Set stack pointer mov r7, #0 // Clear frame pointer mov r4,r0 // Load continuation mov r5,r1 // continuation parameter mov r6,r2 // Set wait result arg teq r3, #0 beq 1f mov r0, #1 bl _ml_set_interrupts_enabled 1: mov r0,r5 // Set first parameter mov r1,r6 // Set wait result arg blx r4 // Branch to continuation mrc p15, 0, r0, c13, c0, 4 // Read TPIDRPRW LOAD_ADDR_PC(thread_terminate) b . // Not reach /* * thread_t Switch_context(thread_t old, * void (*cont)(void), * thread_t new) */ .text .align 5 .globl EXT(Switch_context) LEXT(Switch_context) teq r1, #0 // Test if blocking on continuaton bne switch_threads // No need to save GPR/NEON state if we are #if __ARM_VFP__ mov r1, r2 // r2 will be clobbered by the save, so preserve it add r3, r0, ACT_KVFP // Get the kernel VFP save area for the old thread... save_vfp_registers // ...and save our VFP state to it mov r2, r1 // Restore r2 (the new thread pointer) #endif /* __ARM_VFP__ */ ldr r3, [r0, TH_KSTACKPTR] // Get old kernel stack top add r3, r3, SS_R4 stmia r3!, {r4-r14} // Save general registers to pcb switch_threads: ldr r3, [r2, TH_KSTACKPTR] // get kernel stack top mcr p15, 0, r2, c13, c0, 4 // Write TPIDRPRW ldr r6, [r2, TH_CTH_SELF] mrc p15, 0, r5, c13, c0, 3 // Read TPIDRURO and r5, r5, #3 // Extract cpu number orr r6, r6, r5 mcr p15, 0, r6, c13, c0, 3 // Write TPIDRURO ldr r6, [r2, TH_CTH_DATA] mcr p15, 0, r6, c13, c0, 2 // Write TPIDRURW load_reg: add r3, r3, SS_R4 ldmia r3!, {r4-r14} // Restore new thread status #if __ARM_VFP__ add r3, r2, ACT_KVFP // Get the kernel VFP save area for the new thread... load_vfp_registers // ...and load the saved state #endif /* __ARM_VFP__ */ bx lr // Return /* * thread_t Shutdown_context(void (*doshutdown)(processor_t), processor_t processor) * */ .text .align 5 .globl EXT(Shutdown_context) LEXT(Shutdown_context) mrc p15, 0, r9, c13, c0, 4 // Read TPIDRPRW #if __ARM_VFP__ add r3, r9, ACT_KVFP // Get the kernel VFP save area for the current thread... save_vfp_registers // ...and save our VFP state to it #endif ldr r3, [r9, TH_KSTACKPTR] // Get kernel stack top add r3, r3, SS_R4 stmia r3!, {r4-r14} // Save general registers to pcb cpsid if // Disable FIQ IRQ ldr r12, [r9, ACT_CPUDATAP] // Get current cpu ldr sp, [r12, CPU_ISTACKPTR] // Switch to interrupt stack LOAD_ADDR_PC(cpu_doshutdown) /* * thread_t Idle_context(void) * */ .text .align 5 .globl EXT(Idle_context) LEXT(Idle_context) mrc p15, 0, r9, c13, c0, 4 // Read TPIDRPRW #if __ARM_VFP__ add r3, r9, ACT_KVFP // Get the kernel VFP save area for the current thread... save_vfp_registers // ...and save our VFP state to it #endif ldr r3, [r9, TH_KSTACKPTR] // Get kernel stack top add r3, r3, SS_R4 stmia r3!, {r4-r14} // Save general registers to pcb ldr r12, [r9, ACT_CPUDATAP] // Get current cpu ldr sp, [r12, CPU_ISTACKPTR] // Switch to interrupt stack LOAD_ADDR_PC(cpu_idle) /* * thread_t Idle_context(void) * */ .text .align 5 .globl EXT(Idle_load_context) LEXT(Idle_load_context) mrc p15, 0, r12, c13, c0, 4 // Read TPIDRPRW ldr r3, [r12, TH_KSTACKPTR] // Get kernel stack top add r3, r3, SS_R4 ldmia r3!, {r4-r14} // Restore new thread status #if __ARM_VFP__ add r3, r9, ACT_KVFP // Get the kernel VFP save area for the current thread... load_vfp_registers // ...and load the saved state #endif bx lr // Return /* * void vfp_save(struct arm_vfpsaved_state *vfp_ss) */ .text .align 2 .globl EXT(vfp_save) LEXT(vfp_save) #if __ARM_VFP__ fmrx r1, fpscr // Get the current FPSCR... str r1, [r0, VSS_FPSCR] // ...and save it to the save area #if (__ARM_VFP__ >= 3) vstmia.64 r0!, {d0-d3} // Save vfp registers vstmia.64 r0!, {d4-d7} vstmia.64 r0!, {d8-d11} vstmia.64 r0!, {d12-d15} vstmia.64 r0!, {d16-d19} vstmia.64 r0!, {d20-d23} vstmia.64 r0!, {d24-d27} vstmia.64 r0!, {d28-d31} #else fstmias r0!, {s0-s31} // Save vfp registers #endif #endif /* __ARM_VFP__ */ bx lr // Return /* * void vfp_load(struct arm_vfpsaved_state *vfp_ss) * * Loads the state in vfp_ss into the VFP registers. */ .text .align 2 .globl EXT(vfp_load) LEXT(vfp_load) #if __ARM_VFP__ /* r0: vfp_ss, r1: unused, r2: unused, r3: unused */ mov r1, r0 #if (__ARM_VFP__ >= 3) vldmia.64 r0!, {d0-d3} // Restore vfp registers vldmia.64 r0!, {d4-d7} vldmia.64 r0!, {d8-d11} vldmia.64 r0!, {d12-d15} vldmia.64 r0!, {d16-d19} vldmia.64 r0!, {d20-d23} vldmia.64 r0!, {d24-d27} vldmia.64 r0!, {d28-d31} #else fldmias r0!, {s0-s31} // Restore vfp registers #endif /* __ARM_VFP__ >= 3 */ ldr r1, [r1, VSS_FPSCR] // Get fpscr from the save state... fmxr fpscr, r1 // ...and load it into the register #endif /* __ARM_VFP__ */ bx lr // Return #include "globals_asm.h" LOAD_ADDR_GEN_DEF(thread_terminate) LOAD_ADDR_GEN_DEF(cpu_doshutdown) LOAD_ADDR_GEN_DEF(cpu_idle) /* vim: set ts=4: */ |