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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 | /* * Copyright (c) 2007-2023 Apple Inc. All rights reserved. * * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ * * This file contains Original Code and/or Modifications of Original Code * as defined in and that are subject to the Apple Public Source License * Version 2.0 (the 'License'). You may not use this file except in * compliance with the License. The rights granted to you under the License * may not be used to create, or enable the creation or redistribution of, * unlawful or unlicensed copies of an Apple operating system, or to * circumvent, violate, or enable the circumvention or violation of, any * terms of an Apple operating system software license agreement. * * Please obtain a copy of the License at * http://www.opensource.apple.com/apsl/ and read it before using this file. * * The Original Code and all software distributed under the License are * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. * Please see the License for the specific language governing rights and * limitations under the License. * * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ */ /* * @OSF_COPYRIGHT@ * */ #ifndef ARM_CPU_DATA_INTERNAL #define ARM_CPU_DATA_INTERNAL #include <mach_assert.h> #include <kern/assert.h> #include <kern/kern_types.h> #include <kern/percpu.h> #include <kern/processor.h> #include <os/base.h> #include <pexpert/pexpert.h> #include <arm/dbgwrap.h> #include <arm/machine_routines.h> #include <arm64/proc_reg.h> #include <arm/thread.h> #include <arm/pmap.h> #include <machine/monotonic.h> #include <san/kcov_data.h> #include <arm64/cpc_arm64.h> #define NSEC_PER_HZ (NSEC_PER_SEC / 100) typedef struct reset_handler_data { vm_offset_t assist_reset_handler; /* Assist handler phys address */ vm_offset_t cpu_data_entries; /* CpuDataEntries phys address */ } reset_handler_data_t; #if !CONFIG_SPTM extern reset_handler_data_t ResetHandlerData; #endif /* Put the static check for cpumap_t here as it's defined in <kern/processor.h> */ static_assert(sizeof(cpumap_t) * CHAR_BIT >= MAX_CPUS, "cpumap_t bitvector is too small for current MAX_CPUS value"); #define CPUWINDOWS_BASE_MASK 0xFFFFFFFFFFD00000UL #define CPUWINDOWS_BASE (VM_MAX_KERNEL_ADDRESS & CPUWINDOWS_BASE_MASK) #define CPUWINDOWS_TOP (CPUWINDOWS_BASE + (MAX_CPUS * CPUWINDOWS_MAX * ARM_PGBYTES)) #ifndef __BUILDING_XNU_LIBRARY__ /* in user-mode kernel addresses are low */ static_assert((CPUWINDOWS_BASE >= VM_MIN_KERNEL_ADDRESS) && ((CPUWINDOWS_TOP - 1) <= VM_MAX_KERNEL_ADDRESS), "CPU copy windows too large for CPUWINDOWS_BASE_MASK value"); #endif typedef struct cpu_data_entry { void *cpu_data_paddr; /* Cpu data physical address */ struct cpu_data *cpu_data_vaddr; /* Cpu data virtual address */ #if !defined(__arm64__) #error Check cpu_data_entry padding for this architecture #endif } cpu_data_entry_t; typedef struct rtclock_timer { mpqueue_head_t queue; uint64_t deadline; uint32_t is_set:1, has_expired:1, :0; } rtclock_timer_t; typedef struct { /* * The wake variants of these counters are reset to 0 when the CPU wakes. */ uint64_t irq_ex_cnt; uint64_t irq_ex_cnt_wake; uint64_t ipi_cnt; uint64_t ipi_cnt_wake; uint64_t timer_cnt; #if CONFIG_CPU_COUNTERS uint64_t pmi_cnt_wake; #endif /* CONFIG_CPU_COUNTERS */ uint64_t undef_ex_cnt; uint64_t unaligned_cnt; uint64_t vfp_cnt; uint64_t data_ex_cnt; uint64_t instr_ex_cnt; } cpu_stat_t; __options_closed_decl(cpu_flags_t, uint16_t, { SleepState = 0x0800, /* For the boot processor, StartedState means 'interrupts initialized' - it is already running */ StartedState = 0x1000, /* For the boot processor, InitState means 'cpu_data fully initialized' - it is already running */ InitState = 0x2000, }); __options_closed_decl(cpu_signal_t, unsigned int, { SIGPnop = 0x00000000U, /* Send IPI with no service */ SIGPMaintenance = 0x00000001U, /* SMR, Ledger flush */ /* 0x2U unused */ SIGPxcall = 0x00000004U, /* Call a function on a processor */ SIGPast = 0x00000008U, /* Request AST check */ SIGPdebug = 0x00000010U, /* Request Debug call */ SIGPLWFlush = 0x00000020U, /* Request LWFlush call */ SIGPLWClean = 0x00000040U, /* Request LWClean call */ /* 0x80U unused */ SIGPkppet = 0x00000100U, /* Request kperf PET handler */ SIGPxcallImm = 0x00000200U, /* Send a cross-call, fail if already pending */ SIGPTimerLocal = 0x00000400U, /* Update the decrementer via timer_queue_expire_local */ SIGPdeferred = 0x00000800U, /* Scheduler deferred IPI to wake core */ #if DEVELOPMENT || DEBUG SIGPtest = 0x00002000U, /* Test signal for panic testing */ #endif SIGPdisabled = 0x80000000U, /* Signal disabled */ }); typedef struct cpu_data { unsigned short cpu_number; _Atomic cpu_flags_t cpu_flags; int cpu_type; int cpu_subtype; int cpu_threadtype; void * XNU_PTRAUTH_SIGNED_PTR("cpu_data.istackptr") istackptr; vm_offset_t intstack_top; #if __arm64__ void * XNU_PTRAUTH_SIGNED_PTR("cpu_data.excepstackptr") excepstackptr; vm_offset_t excepstack_top; #endif thread_t cpu_active_thread; vm_offset_t cpu_active_stack; cpu_id_t cpu_id; volatile cpu_signal_t cpu_signal; ast_t cpu_pending_ast; cache_dispatch_t cpu_cache_dispatch; #if __arm64__ uint64_t cpu_base_timebase; uint64_t cpu_timebase; #endif bool cpu_hibernate; /* This cpu is currently hibernating the system */ bool cpu_running; bool cluster_master; bool sync_on_cswitch; /* true if processor_start() or processor_exit() is operating on this CPU */ bool in_state_transition; uint32_t cpu_decrementer; get_decrementer_t cpu_get_decrementer_func; set_decrementer_t cpu_set_decrementer_func; fiq_handler_t cpu_get_fiq_handler; void *cpu_tbd_hardware_addr; void *cpu_tbd_hardware_val; processor_idle_t cpu_idle_notify; uint64_t cpu_idle_latency; uint64_t cpu_idle_pop; #if __ARM_KERNEL_PROTECT__ vm_offset_t cpu_exc_vectors; #endif /* __ARM_KERNEL_PROTECT__ */ vm_offset_t cpu_reset_handler; uintptr_t cpu_reset_assist; uint32_t cpu_reset_type; unsigned int interrupt_source; void *cpu_int_state; IOInterruptHandler interrupt_handler; void *interrupt_nub; void *interrupt_target; void *interrupt_refCon; idle_timer_t idle_timer_notify; void *idle_timer_refcon; uint64_t idle_timer_deadline; uint64_t rtcPop; rtclock_timer_t rtclock_timer; struct _rtclock_data_ *rtclock_datap; arm_debug_state_t *cpu_user_debug; /* Current debug state */ vm_offset_t cpu_debug_interface_map; volatile int debugger_active; volatile int PAB_active; /* Tells the console if we are dumping backtraces */ void *cpu_xcall_p0; void *cpu_xcall_p1; void *cpu_imm_xcall_p0; void *cpu_imm_xcall_p1; #if __arm64__ vm_offset_t coresight_base[CORESIGHT_REGIONS]; #endif #if NEEDS_MTE_IRG_RESEED uint64_t cpu_irg_reseed_counter; #endif /* CCC ARMv8 registers */ uint64_t cpu_regmap_paddr; uint32_t cpu_phys_id; platform_error_handler_t platform_error_handler; int cpu_mcount_off; #define ARM_CPU_ON_SLEEP_PATH 0x50535553UL volatile unsigned int cpu_sleep_token; unsigned int cpu_sleep_token_last; cluster_type_t cpu_cluster_type; uint32_t cpu_cluster_id; uint32_t cpu_l2_id; uint32_t cpu_l2_size; uint32_t cpu_l3_id; uint32_t cpu_l3_size; enum { CPU_NOT_HALTED = 0, CPU_HALTED, CPU_HALTED_WITH_STATE } halt_status; #if defined(HAS_APPLE_PAC) uint64_t rop_key; uint64_t jop_key; #endif /* defined(HAS_APPLE_PAC) */ #if CONFIG_CPU_COUNTERS struct cpc_cpu cpu_cpc; // For thread counting in kpc. uint64_t *cpu_kpc_buf[2]; #endif /* CONFIG_CPU_COUNTERS */ cpu_stat_t cpu_stat; #if !XNU_MONITOR struct pmap_cpu_data cpu_pmap_cpu_data; #endif dbgwrap_thread_state_t halt_state; #if DEVELOPMENT || DEBUG uint64_t wfe_count; uint64_t wfe_deadline_checks; uint64_t wfe_terminations; #endif #if CONFIG_KCOV kcov_cpu_data_t cpu_kcov_data; #endif #if __arm64__ /** * Stash the state of the system when an IPI is received. This will be * dumped in the case a panic is getting triggered. */ uint64_t ipi_pc; uint64_t ipi_lr; uint64_t ipi_fp; /* Encoded data to store in TPIDR_EL0 on context switch */ uint64_t cpu_tpidr_el0; #endif #ifdef APPLEEVEREST /* PAs used to apply pio locks in early boot. */ uint64_t cpu_reg_paddr; uint64_t acc_reg_paddr; uint64_t cpm_reg_paddr; #endif #if HAS_MTE uint64_t mte_rgsr_el1_seed; #endif } cpu_data_t; extern cpu_data_entry_t CpuDataEntries[MAX_CPUS]; PERCPU_DECL(cpu_data_t, cpu_data); #define BootCpuData __PERCPU_NAME(cpu_data) extern boot_args *BootArgs; #if __arm64__ extern unsigned int LowResetVectorBase; extern unsigned int LowResetVectorEnd; #if WITH_CLASSIC_S2R extern uint8_t SleepToken[8]; #endif extern unsigned int LowExceptionVectorBase; #else #error Unknown arch #endif extern cpu_data_t *cpu_datap(int cpu); extern cpu_data_t *cpu_data_alloc(boolean_t is_boot); extern void cpu_stack_alloc(cpu_data_t*); extern void cpu_data_init(cpu_data_t *cpu_data_ptr); extern void cpu_data_register(cpu_data_t *cpu_data_ptr); extern cpu_data_t *processor_to_cpu_datap( processor_t processor); #endif /* ARM_CPU_DATA_INTERNAL */ |