--- dyld/dyld-1245.1/cache_builder/BuilderConfig.cpp
+++ dyld/dyld-1122.1/cache_builder/BuilderConfig.cpp
@@ -75,15 +75,9 @@
     return archName == "arm64e";
 }
 
-static uint32_t supportsTPROMapping(std::string_view archName)
-{
-    return (archName != "x86_64") && (archName != "x86_64h");
-}
-
 cache_builder::Layout::Layout(const BuilderOptions& options)
     : is64(options.archs.supports64())
     , hasAuthRegion(::hasAuthRegion(options.archs.name()))
-    , tproIsInData(!::supportsTPROMapping(options.archs.name()))
     , pageSize(defaultPageSize(options.archs.name()))
 {
     std::string_view archName = options.archs.name();
@@ -92,7 +86,17 @@
         // x86_64 uses discontiguous mappings
         this->discontiguous.emplace();
 
-        this->discontiguous->regionAlignment = 1_GB;
+        if ( options.isSimulator() ) {
+            // The simulator has fixed addresses
+            this->discontiguous->simTextSize = CacheVMSize(1.5_GB);
+            this->discontiguous->simDataSize = CacheVMSize(1_GB);
+            this->discontiguous->simLinkeditSize = CacheVMSize(1_GB);
+            this->discontiguous->simTextBaseAddress = CacheVMAddress(X86_64_SHARED_REGION_START);
+            this->discontiguous->simDataBaseAddress = this->discontiguous->simTextBaseAddress + this->discontiguous->simTextSize;
+            this->discontiguous->simLinkeditBaseAddress = this->discontiguous->simDataBaseAddress + this->discontiguous->simDataSize;
+        } else {
+            this->discontiguous->regionAlignment = 1_GB;
+        }
     } else {
         // Everyone else uses contiguous mappings
         this->contiguous.emplace();
@@ -100,17 +104,15 @@
         this->contiguous->subCacheStubsLimit = CacheVMSize(110_MB);
     }
 
-    if ( (archName == "x86_64") || (archName == "x86_64h") ) {
-        this->subCacheTextLimit = CacheVMSize(512_MB);
-    } else {
-        // Note the 64MB is to give us just a little more space before making another
-        // sub cache file.  We want to make as few files as possible for things like page-tables
-        // The real constraint here is that TEXT+DATA must stay within 2GB for int32_t relative
-        // offsets in objc/swift metadata and in unwind info.  But also the __objc_opt section
-        // in libobjc needs to reach the __OBJC_RO in the read-only subcache.  That comes after
-        // data and as of writing leaves 150MB from its end until the 2GB mark.  So take 64MB from
-        // that 150MB and hope its ok for now.
-        this->subCacheTextLimit = CacheVMSize(1.5_GB + 64_MB);
+    if ( !options.isSimulator() ) {
+        // Devices always get large layout.  Simulators get the regular layout
+        this->large.emplace();
+
+        if ( (archName == "x86_64") || (archName == "x86_64h") ) {
+            this->large->subCacheTextLimit = CacheVMSize(512_MB);
+        } else {
+            this->large->subCacheTextLimit = CacheVMSize(1.25_GB);
+        }
     }
 
     struct CacheLayout
@@ -125,27 +127,17 @@
         layout.cacheSize = X86_64_SHARED_REGION_SIZE;
     } else if ( (archName == "arm64") || (archName == "arm64e") ) {
         layout.baseAddress = ARM64_SHARED_REGION_START;
-
-        if ( options.isSimulator() ) {
-            // Limit to 4GB to support back deployment to older hosts with 4GB shared regions
-            layout.cacheSize = 4_GB;
-        } else {
-            layout.cacheSize = ARM64_SHARED_REGION_SIZE;
-        }
-
-        // Limit the max slide for arm64 based caches to 512MB.  Combined with large
-        // caches putting 1.5GB of TEXT in the first cache region, this will ensure that
-        // this 1.5GB of TEXT will stay in the same 2GB region.  <rdar://problem/49852839>
-        cacheMaxSlide = 512_MB;
+        layout.cacheSize = ARM64_SHARED_REGION_SIZE;
     } else if ( archName == "arm64_32" ) {
         layout.baseAddress = ARM64_32_SHARED_REGION_START;
-        layout.cacheSize = 2_GB;
+        layout.cacheSize = ARM64_32_SHARED_REGION_SIZE;
     } else {
         assert("Unknown arch");
     }
 
     this->cacheBaseAddress          = CacheVMAddress(layout.baseAddress);
     this->cacheSize                 = CacheVMSize(layout.cacheSize);
+    this->allLinkeditInLastSubCache = this->cacheSize <= CacheVMSize(4_GB);
 }
 
 //
@@ -177,17 +169,10 @@
         }
     }
     else if ( archName == "arm64e" ) {
+        this->slideInfoFormat = SlideInfoFormat::v3;
+
         // 1 uint16_t per page
         this->slideInfoBytesPerDataPage = 2;
-
-        if ( layout.cacheSize > CacheVMSize(4_GB) ) {
-            this->slideInfoFormat = SlideInfoFormat::v5;
-
-            // 16k pages so that we can also use page-in linking for this format
-            this->slideInfoPageSize = 0x4000;
-        } else {
-            this->slideInfoFormat = SlideInfoFormat::v3;
-        }
     }
     else if ( archName == "arm64_32" ) {
         this->slideInfoFormat = SlideInfoFormat::v1;