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--- dyld/dyld-1162/cache_builder/BuilderConfig.cpp
+++ dyld/dyld-1122.1/cache_builder/BuilderConfig.cpp
@@ -86,7 +86,17 @@
// x86_64 uses discontiguous mappings
this->discontiguous.emplace();
- this->discontiguous->regionAlignment = 1_GB;
+ if ( options.isSimulator() ) {
+ // The simulator has fixed addresses
+ this->discontiguous->simTextSize = CacheVMSize(1.5_GB);
+ this->discontiguous->simDataSize = CacheVMSize(1_GB);
+ this->discontiguous->simLinkeditSize = CacheVMSize(1_GB);
+ this->discontiguous->simTextBaseAddress = CacheVMAddress(X86_64_SHARED_REGION_START);
+ this->discontiguous->simDataBaseAddress = this->discontiguous->simTextBaseAddress + this->discontiguous->simTextSize;
+ this->discontiguous->simLinkeditBaseAddress = this->discontiguous->simDataBaseAddress + this->discontiguous->simDataSize;
+ } else {
+ this->discontiguous->regionAlignment = 1_GB;
+ }
} else {
// Everyone else uses contiguous mappings
this->contiguous.emplace();
@@ -94,10 +104,15 @@
this->contiguous->subCacheStubsLimit = CacheVMSize(110_MB);
}
- if ( (archName == "x86_64") || (archName == "x86_64h") ) {
- this->subCacheTextLimit = CacheVMSize(512_MB);
- } else {
- this->subCacheTextLimit = CacheVMSize(1.5_GB);
+ if ( !options.isSimulator() ) {
+ // Devices always get large layout. Simulators get the regular layout
+ this->large.emplace();
+
+ if ( (archName == "x86_64") || (archName == "x86_64h") ) {
+ this->large->subCacheTextLimit = CacheVMSize(512_MB);
+ } else {
+ this->large->subCacheTextLimit = CacheVMSize(1.25_GB);
+ }
}
struct CacheLayout
@@ -112,21 +127,7 @@
layout.cacheSize = X86_64_SHARED_REGION_SIZE;
} else if ( (archName == "arm64") || (archName == "arm64e") ) {
layout.baseAddress = ARM64_SHARED_REGION_START;
-
- if ( options.isSimulator() ) {
- // Limit to 4GB to support back deployment to older hosts with 4GB shared regions
- layout.cacheSize = 4_GB;
- } else if ( options.platform == dyld3::Platform::macOS ) {
- layout.cacheSize = ARM64_SHARED_REGION_SIZE;
- } else {
- // Temporarily limit embedded/driverKit to 4GB
- layout.cacheSize = 4_GB;
- }
-
- // Limit the max slide for arm64 based caches to 512MB. Combined with large
- // caches putting 1.5GB of TEXT in the first cache region, this will ensure that
- // this 1.5GB of TEXT will stay in the same 2GB region. <rdar://problem/49852839>
- cacheMaxSlide = 512_MB;
+ layout.cacheSize = ARM64_SHARED_REGION_SIZE;
} else if ( archName == "arm64_32" ) {
layout.baseAddress = ARM64_32_SHARED_REGION_START;
layout.cacheSize = ARM64_32_SHARED_REGION_SIZE;
@@ -168,17 +169,10 @@
}
}
else if ( archName == "arm64e" ) {
+ this->slideInfoFormat = SlideInfoFormat::v3;
+
// 1 uint16_t per page
this->slideInfoBytesPerDataPage = 2;
-
- if ( layout.cacheSize > CacheVMSize(4_GB) ) {
- this->slideInfoFormat = SlideInfoFormat::v5;
-
- // 16k pages so that we can also use page-in linking for this format
- this->slideInfoPageSize = 0x4000;
- } else {
- this->slideInfoFormat = SlideInfoFormat::v3;
- }
}
else if ( archName == "arm64_32" ) {
this->slideInfoFormat = SlideInfoFormat::v1;